Electrically programmable non-volatile memories, such as EEPROMs or Flash EEPROMs use a high voltage for their programming or erasure. This high voltage is generally between 10 and 20 Volts. In an integrated circuit, a high voltage of this kind is generally obtained from the logic supply voltage VCC of the integrated circuit through a high-voltage generator comprising a charge pump. The generator usually has a regulator to regulate the HV output level of the charge pump to obtain a determined nominal level HV0 as a function of the application envisaged.
A prior art high-voltage generator 100 is shown in FIG. 1. It has an oscillator 10 which, when activated by an enabling signal OK, provides two clock signals F and /F in phase opposition. The clock signals F and /F are used by a charge pump 20 for outputting a high voltage HV. The high voltage HV is applied to a load 40 for programming or erasing a non-volatile memory, for example.
The high voltage HV is also applied to a regulation circuit or regulator 30 that outputs a signal REG. The signal REG is active if the voltage HV is below a predefined level HV0. In the illustrated example of FIG. 1, the signal REG is equal to a logic 1. Otherwise, the signal REG is inactive. The output of the regulator 30 is looped back to the enabling input of the oscillator through an AND logic gate 50. The AND logic gate 50 receives the signal REG and the signal RUN to start the high-voltage generator 100, and produces the signal OK.
The general operation of the generator 100 is explained below with reference to FIG. 2, which shows the progress in time of the signals RUN, F, /F, HV and REG. The generator 100 is activated by the signal RUN. During an initial starting phase, the signal REG is active because the voltage HV is initially zero, and places the oscillator 10 into operation. The oscillator 10 then produces the signals F, /F for driving the charge pump 20. The voltage HV at the output of the pump 20 increases until it reaches the value HV0. This build-up, which is relatively slow, corresponds to a phase for the charging of the capacitors of the different stages of the pump 20. This charging is achieved by successive transfers of charges from one stage of the pump to the next stage.
When the voltage HV reaches the level HV0, the regulator 30 deactivates the signal REG by setting it at an inactive value. In this case a logic 0. The inactive signal REG stops the oscillator 10. Since the signals F, /F are no longer given by the oscillator 10, the pump 20 also stops. The output voltage HV will then decrease with varying speed depending on the current consumption of the load 40 that uses the voltage HV and/or depending on current leakages, if any. When the voltage returns below HV0, the regulator reactivates the signal REG, the oscillator 10 and the pump 20 start up again, and the voltage HV increases again.
Thus, after the pump-starting phase, a phase of stable operation begins. During the stable phase, the oscillator 10 will start again and then stop periodically to sustain the level HV0 of the voltage HV at output of the charge pump 20. The oscillator 10 is activated more frequently as the current put through by the load 40 is increased. During stable operation, the voltage HV has a saw-toothed shape due to hysteresis. The oscillator 10 starts or stops for a certain period of time after HV passes below or above HV0, i.e., for the time necessary for the regulator 30 to detect the value of HV and produce the signal REG. Thus, the maximum value of HV is slightly above HV0 and the critical value of HV is slightly below HV0.
FIGS. 3a to 3d show the progress in time of the voltage HV for different values of supply voltage VCC and for different load values. FIG. 3a corresponds to a high-voltage generator that is powered by a low voltage VCC (about 2 to 3V) and provides a low current to the load 40. The current may be tens of microamperes or less. FIG. 3b corresponds to a high-voltage generator powered by a low voltage VCC and provides substantial current in the range of some milliamperes to the load. FIG. 3c corresponds to a generator powered by a high-voltage VCC (about 4 to 5V) and provides a low current to the load. Finally, FIG. 3d corresponds to a generator powered by a high-voltage VCC and provides a substantial current to the load. The signal REG reacts as a function of the variations in the voltages HV.
It can thus be seen in FIGS. 3a to 3d that the higher the voltage VCC, the sharper are the slopes of the HV build-up phases, and the shorter is the duration of the build-up (signal REG is active). Inversely, the higher the current consumed, the sharper are the slopes of the HV descending phases and the shorter is the duration of the descending phases (signal REG is inactive).
In the example, the charge pump 20 is a Schenkel multiplier. It is formed conventionally by n+1 identical diodes D1 to Dn+1 connected in series. The power supply voltage VCC is applied to the anode of the first diode D1, and the last diode Dn+1 provides the high voltage HV at output on its cathode. The pump 20 also has a capacitor Cout connected between the output of the last diode Dn+1 and ground of the circuit. The pump 20 finally comprises n identical capacitors C1 to Cn controlled by the signals F or /F. Each capacitor C1 to Cn has a first terminal connected between two successive diodes, and a second terminal to which the signal F or the signal /F is applied.
In the example of FIG. 1, the signal F is applied to the second terminal of the odd-ranking capacitors C1, C3, . . . , Cn and the signal /F is applied to the second terminal of the even-ranking capacitors C2, . . . , Cn−1. The association of a diode Di with a capacitor Ci forms a stage Ei of the pump. The pump 20 is thus formed by n stages E1 to En, and each stage Ei raises the voltage that it receives at the input (namely the input of the diode Di) by VCC-VDD. VDD is the threshold of the diodes D1 to Dn+1.
Thus, a charge pump with n stages is equivalent to a Thevenin generator whose theoretical characteristics are HV=(n+1). (VCC-VDD) and R=n/ (C0.f), where C0 is the capacitance of the capacitors C1 to Cn and f is the frequency of the oscillator 10. The number n of stages of the pump 20 is chosen as a function of the power supply voltage VCC and the desired high voltage HV. In theory, it would be possible to choose n=5 to obtain a voltage HV of 18 V from a voltage VCC of 3 V. However, it is preferred that n is in the range of 10 to compensate for the ohmic losses of the equivalent Thevenin generator, and actually obtain a voltage HV of 18 V.
The oscillator 10 is not described in detail. It is made according to a known scheme for this type of application. The regulator 30 comprises a stack of Zener type p diodes (three diodes Z1 to Z3 are shown) that are series-connected. The cathode of the first diode Z1 is connected to the output of the charge pump 20 to receive the high voltage HV, and the anode of the last diode Z3 is connected to the drain (point A) of an N-type transistor T1 whose source is connected to ground of the circuit. In the example, the p diodes are identical and have a conduction threshold VZ of about 5.3V.
The regulator 30 also has a P-type transistor T2. The voltage VCC is applied to the source of this transistor T2 and its drain is connected to the drain of an N-type transistor T3 whose source is grounded. A voltage VREFN is applied to the gate of the transistor T1 and the voltage VREFP is applied to the gate of the transistor T2. VREFN and VREFP are chosen so that T1, T2 are always on and are in a saturation mode. T1, T2 are thus equivalent to current sources.
The gate of T3 is connected to the drain of T1 (point A). Finally, the common drain of the transistors T2, T3 (point B) is connected to the output of the regulated by two inverters I1, I2 that are series-connected. The two inverters I1, I2 simply have the function of converting the analog signal at the point B into a logic signal REG, produced at output of the regulator.
If the Zener diodes are identical, the level at which the regulator switches over is fixed by the relationship HV0=p.VZ+VTN, with p being the number of Zener diodes used, VZ being the conduction threshold of the Zener diodes and VTN being the threshold of the transistor T1. The number of diodes and the value of their threshold are chosen as a function of the value desired for HV0. For example, in using three Zener diodes with a threshold of about 5.3V and a transistor T1 having a threshold of about 1V, the switch-over threshold HV0 of the regulator 30 is about 17V.
The regulator 30 works as follows. If the voltage HV applied to the diode Z1 is below HV0, the current IA flowing in the diodes and the transistor T1 pulls the point A to 0 volts and the transistor T3 is therefore off. Since T2 is on, the current IB flowing in T2 draws the point B to VCC and the signal REG is equal to a logic one. Inversely, if the voltage HV is higher than HV0, the current IA draws the point A to a level sufficient to turn the transistor T3 on, the current IB flowing in T2, T3 draws the point B to ground and the signal REG is equal to a logic zero.
The capacitors of the charge pump are subjected to high voltages, especially the capacitors of the last stages of the pump closest to the output. To make them, the transistors used are sometimes transistors having high-voltage gate oxides that are thicker, conventionally having a thickness of 25 to 40 nm and capable of withstanding voltages in the range of 25 to 40V. However, these values are approximate, and statistically, the oxide may break down for voltages far below 25V. It is thus noted that several tens of ppm (ppm) of the capacitors specified for a rated voltage of 25V break down for voltages in the range of 10 to 15V.
One approach to this problem is to further increase the thickness of the oxides used to make the capacitors. However, this approach is not satisfactory. Indeed, the breakdown strength of a thicker oxide is not proportional to its thickness. Furthermore, increasing the thickness of the oxide assumes making a corresponding increase in the surface area of the capacitors to preserve a same capacitance value. Finally, thickening the oxides leads to an increase in the voltage thresholds of the high-voltage transistors used, to the point of making them unusable in the desired voltage field.